Three Pillars of Computer Architecture-Advance Computer Architecture-Lecture Slides, Slides of Advanced Computer Architecture

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Today‟s Topics

Recap

ISA Taxonomy

Memory Addressing modes

Types of operands

Types of operations

Summary

Recap: Lec. 1-3 Chapter 1

Computer design cycle

Performance metrics:

Processor and I/O systems

Price-Performance design

Benchmarks: Performance evaluation

Quantitative principles:

Performance enhancement

Changing Definitions of Computer

Architecture …….. Cont’d

1950s to 1960s:

The focus of the Computer Architecture Courses

has been Computer Arithmetic

1970s to mid 1980s:

The focus of Computer Architecture Course has

been Instruction Set Design, the portion of the

computer visible to programmer and compiler

writer ….. Cont‟d

Changing Definitions of Computer Architecture … Cont‟d

1990s to date:

The focus of the Computer Architecture Course

is the Design of CPU, memory system, I/O system,

Multiprocessors based on the quantitative

principles to have price - performance design; i.e.,

maximum performance at minimum price

Instruction Set

Architecture – ISA

instruction set

software

hardware

The design of hardware and software

can‟t be initiated without defining ISA

It describes the instruction word format

and identifies the memory addressing

for data manipulation and control

operations

What is an

interface?

A good interface:

• Lasts through many implementations

(portability, compatibility)

• Is used in many different ways (generality)
• Provides convenient functionality to

higher levels

• Permits an efficient implementation at

lower levels

Interface

imp 1

imp 2

imp 3

use

use

use

time

Taxonomy of Instruction Set ….. Cont’d

Basic Differentiator: The type of

internal storage of the operand

Major Choices of ISA:

• Stack Architecture:
• Accumulator Architecture
• General Purpose Register Architecture

 Register – memory

 Register – Register (load/store)

 Memory – Memory Architecture (Obsolete)

Stack Architecture

Both the operands are

implicitly on the TOS

Thus, it is also referred to as

Zero-Address machine

The operand may be either

an input (orange shade) or

result from the ALU (yellow

shade)

All operands are implicit

(implied or inherited)

The first operand is removed

from the stack and the

second operand is replaced

by the result

TOS

ALU

Processor

Memory

Accumulator Architecture

An accumulator is a special register within the CPU that serves both as both the as the implicit source of one operand and as the result destination for arithmetic and logic operations.

Thus, it accumulates or collect data and doesn‟t serve as an address register at any time

Limited number of accumulators - usually only one – are used

The second operand is in the memory, thus accumulator based machines are also called 1- address machines

They are useful when memory is expensive or when a limited number of addressing modes is to be used

ALU

Processor

Memory

Accumulator Architecture

To execute: C=A+B

ADD instruction has implicit

operand A for the accumulator, written using LOAD instruction;

and the second operand B is in

memory at address B

Load A

ADD B

Store C

ALU

. .

General Purpose Register Architecture

One explicit operand is in a register and one in memory and the result goes into the register

The operand in memory is accessed directly

To execute: C=A+B

ADD instruction has explicit operand A loaded in a register and the operand B is in memory and the result is in register

Load R1, A

ADD R3, R1, B

Store R3, C

Register – Memory Architecture

R

ALU

Memory

R R

Processor....

General Purpose Register Architecture

The explicit operands in memory are first loaded into registers temporarily and

Are transferred to memory by Store instruction

To execute: C=A+B

ADD instruction has implicit operands A and B loaded in registers

Load R1, A Load R2, B ADD R3, R1, R Store R3, C Both the explicit operands are not accessed from memory directly, i.e., Memory – Memory Architecture is obsolete

Register – Register (Load/store) Architecture

R

ALU

Memory

R

Processor....

R

Comparison of three GPR Architectures

Register- Memory

Advantages

Data can be accessed without separate Load first

Instruction format is easy to encode

Disadvantages

Operands are not equivalent since a source

operand (in a register) is destroyed in operation

Encoding a register number and memory address

in each instruction may restrict the number of

registers

CPI vary by operand location

Comparison of three GPR Architectures

Memory- Memory

Advantages

Most compact

Doesn‟t waste registers for temporary

storages

Disadvantages

Large variation in instruction size

Large variation in work per instruction

Memory bottleneck by memory access