BJT Biasing Circuits: DC Analysis and Types, Exercises of Electric Machines

Download BJT Biasing Circuits: DC Analysis and Types and more Exercises Electric Machines in PDF only on Docsity!

Chapter 4

BJT BIASING CIRCUIT

Introduction – Biasing

The analysis or design of a transistor amplifier requires knowledge of both the dc and ac response of the system. In fact, the amplifier increases the strength of a weak signal by transferring the energy from the applied DC source to the weak input ac signal The analysis or design of any electronic amplifier therefore has two components:

• The dc portion and
• The ac portion During the design stage, the choice of parameters for the required dc levels will affect the ac response. What is biasing circuit? Biasing: Application of dc voltages to establish a fixed level of current and voltage.

Operating Point

• Active or Linear Region Operation Base – Emitter junction is forward biased Base – Collector junction is reverse biased Good operating point
• Saturation Region Operation Base – Emitter junction is forward biased Base – Collector junction is forward biased
• Cutoff Region Operation Base – Emitter junction is reverse biased

BJT Analysis

DC analysis

Calculate the DC Q-point

solving input andoutput loops GraphicalMethod

AC analysis

Calculate gains of theamplifier

DC Biasing Circuits

•Fixed-bias circuit •Emitter-stabilized bias circuit •Collector-emitter loop •Voltage divider bias circuit •DC bias with voltage feedback

FIXED BIAS CIRCUIT

 1 st^ step: Locate capacitors and replace them with an open

circuit

FIXED BIAS CIRCUIT

 2 nd^ step: Locate 2 main loops.

1 2

1

2

BE Loop CE Loop

FIXED BIAS CIRCUIT

 CE Loop Analysis

■ From KVL;

■ As we known;

■ Substituting with

(^2) IC = βI B

IC

CC C C CE^0

CE CC C C

V I R V

V V I R

B A B

B

CC BE C DC R

V V

I β

Note that RC does not affect the value of Ic

FIXED BIAS CIRCUIT

 DISADVANTAGE

Unstable – because it is too dependent on β and produce

width change of Q-point

For improved bias stability , add emitter resistor to dc bias.

Plot load line equation

IC(sat) occurs when transistor operating in saturation region

V CE(off) occurs when transistor operating in cut-off region

V (^) CE =V (^) CC −I (^) C RC

= 0

= CE

sat C V

CC C R

V I

= −

CE off CC C C IC

V V I R

Circuit Values Affect the Q-Point

Decreasing Vcc

Increasing Rc

Varying Ib

EMITTER-STABILIZED BIAS CIRCUIT

 1 st^ step: Locate capacitors and replace them with an open

circuit

EMITTER-STABILIZED BIAS CIRCUIT

 2 nd^ step: Locate 2 main loops.

1 2 2

BE Loop CE Loop

1

EMITTER-STABILIZED BIAS CIRCUIT

 CE Loop Analysis

■ From KVL;

■ Assume;

■ Therefore;

I (^) E ≈ I C

−V CC + I C RC +V CE + I E RE = 0

2

∴VCE =VCC − IC( RC + RE )

Improved Bias Stability

The addition of the emitter resistor to the dc bias of the BJT provides improved stability, that is, the dc bias currents and voltages remain closer to where they were set by the circuit when outside conditions, such as temperature, and transistor beta, change.

( 1)

CC BE c B E

V V I R R

β β

 (^) −  =    +^ + 

Without Re With Re

CC BE c B

V V

I

R

β

Note :it seems that beta in numerator canceled with beta in denominator