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A computer engineering exam from spring 2002. It consists of 4 problems, each with multiple parts, totaling 100 points. The topics covered include numbers and arithmetic, storage, counters, and arithmetic units. The exam is a closed-book, closed-notes exam and is hand-written in pencil. It includes instructions for converting decimal and octal values to binary and hexadecimal, performing arithmetic operations, completing truth tables, designing latches and counters, and adding and subtracting four-bit numbers.
Typology: Exams
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4 problems, 5 pages Exam Two 20 March 2002
Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate the pages of the exam. For maximum credit, show your work. Good Luck!
Your Name ( please print ) ________________________________________________
1 2 3 4 total
4 problems, 5 pages Exam Two 20 March 2002
Problem 1 (3 parts, 30 points) Numbers and Arithmetic
Part A (9 points) Convert some decimal values (and powers of two) into binary notation:
decimal notation binary notation
942
512 billion 2 _________
Part B (9 points) Convert the following octal values into hexadecimal notation:
octal notation hexadecimal notation
555
1234
Part C (12 points) For each problem below, (a) compute the operations using the rules of arithmetic, (b) indicate whether an error occurs assuming all numbers are expressed using a four bit two’s complement representation, and (c) indicate whether an error occurs assuming all numbers are expressed using a four bit unsigned representation.
result
signed error? unsigned error?
4 problems, 5 pages Exam Two 20 March 2002
Problem 3 (2 parts, 20 points) Counters
Part A (10 points) Design a toggle cell using transparent latches and basic gates (AND, OR, NAND, NOR, XOR, XNOR, and NOT). Include an active high toggle enable TE, active low clear CLR, and a two-phase non-overlapping clock PHI1 and PHI2. Label the output OUT.
Part B (10 points) Now use copies your toggle cells (in icon form) to build a divide by five counter. This design should include an active high external count enable CE and an active high external clear CLR. You do not need to draw in the clock signals. Assume all toggle cells are connected to the two-phase clock. Label all of your outputs signals.
4 problems, 5 pages Exam Two 20 March 2002
Problem 4 (2 part, 20 points) Arithmetic Unit
Part A (10 points) The adder below adds two four bit numbers A and B and produces a four bit result S. Add extra digital logic to support subtraction as well as addition. Label inputs X 3 , X 2 ,
X 1 , X 0 , Y 3 , Y 2 , Y 1 , Y 0 , ADD / SUB and outputs Z 3 , Z 2 , Z 1 , Z 0.
Part B (10 points) Now define the behavior for a two’s compliment overflow detection unit.
Assume the inputs are X 3 , Y 3 , Z 3 , and ADD / SUB. The output Error is 1 for overflow.
X 3 Y 3 Z 3 Error X 3 Y 3 Z 3 Error
0 0 0 0 0 0
1 0 0 1 0 0
0 1 0 0 1 0
1 1 0 1 1 0
0 0 1 0 0 1
1 0 1 1 0 1
0 1 1 0 1 1
1 1 1 1 1 1
