



Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Community
Ask the community for help and clear up your study doubts
Discover the best universities in your country according to Docsity users
Free resources
Download our free guides on studying techniques, anxiety management strategies, and thesis advice from Docsity tutors
Solutions for the final exam of a computer engineering course, specifically for ece 2030 in fall 2004. It includes solutions for five problems related to assembly language, representations and arithmetic, mixed logic design, and counters.
Typology: Exams
1 / 5
This page cannot be seen from the preview
Don't miss anything!
5 problems, 5 pages Final Exam Solutions 9 December 2004
Problem 1 (3 parts, 28 points) MinMax
In this problem, you will write a procedure that finds the minimum and maximum values in an array of 250 integers beginning at memory location 0xABC0000. Use only the registers described in the table below plus $0. Your answer should fit in the boxes provided. Be sure to provide comments. The instruction set is listed in a table on the next page. register description register description $1 array pointer $4 max value $2 end test $5 input value $3 min value $6 predicate
Part A (8 points) To begin, write a code fragment that initialize variables before beginning the main loop.
label instruction comment MinMax: lui $1, 0xABC # init starting ptr ori $2, $1, 1000 # init end ptr value lw $3, ($1) # init min lw $4, ($1) # init max
Part B (14 points) Write a code fragment that loads the next array element and appropriately updates the current min and max value if necessary.
label instruction comment Loop: lw $5, ($1) # load input slt $6, $5, $3 # compare input to min beq $6, $0, Skip1 # skip if input >= min add $3, $5, $0 # else update new min Skip1: slt $6, $4, $5 # compare max to input beq $6, $0, Skip2 # skip if max >= input add $4, $5, $0 # else update new max
Part C (6 points) Write a code fragment that adjusts the array pointer, loops if necessary, and returns to the caller if done.
label instruction comment Skip2: addi $1, $1, 4 # adjust ptr to next input bne $1, $2, Loop # if not end, loop jr $31 # return to caller
5 problems, 5 pages Final Exam Solutions 9 December 2004
Problem 2 (4 parts, 24 points) Assembly Language Consider the following MIPS program fragment. The instruction set is listed below. address label instruction 1000 lui $5, 0x 1004 ori $5, $5, 0x 1008 skip1: ori $3, $0, 100 1012 sw $5, ($3) 1014 Repeat: add $3, $3, - 1020 jal Foo 1024 bne $3, $0, Repeat Part A (6 points) What is the branch offset (in bytes) for the bne instruction?
branch offset (in bytes): -3 instructions x 4 bytes/instruction = -12 bytes Part B (6 points) How many times will subroutine foo be called in this fragment?
number of calls to foo: 100 / 4 = 25 times
Part C (6 points) What does $31 contain when subroutine foo begins execution?
contents of $31 (in decimal): 1024
Part D (6 points) What memory address is modified at instruction 1012? What value is written?
location modified? 100 value written? 0x
instruction example meaning add add $1,$2,$3 $1 = $2 + $ subtract sub $1,$2,$3 $1 = $2 - $ add immediate addi $1,$2,100 $1 = $2 + 100 multiply mul $1,$2,$3 $1 = $2 * $ divide div $1,$2,$3 $1 = $2 / $ and and $1,$2,$3 $1 = $2 & $ or or $1,$2,$3 $1 = $2 | $ xor xor $1,$2,$3 $1 = $2 xor $ and immediate andi $1,$2,100 $1 = $2 & 100 or immediate ori $1,$2,100 $1 = $2 xor 100 xor immediate xori $1,$2,100 $1 = $2 | 100 shift left logical sll $1,$2,5 $1 = $2 << 5 (logical) shift right logical srl $1,$2,5 $1 = $2 >> 5 (logical) shift left arithmetic sla $1,$2,5 $1 = $2 << 5 (arithmetic) shift right arithmetic sra $1,$2,5 $1 = $2 >> 5 (arithmetic) load word lw $1, ($2) $1 = memory [$2] store word sw $1, ($2) memory [$2] = $ load upper immediate lui $1,100 (^) $1 = 100 x 2 16 branch if equal beq $1,$2,100 if ($1 = $2), PC = PC + 4 + (1004) branch if not equal bne $1,$2,100 if ($1 ≠ $2), PC = PC + 4 + (1004) set if less than slt $1, $2, $3 if ($2 < $3), $1 = 1 else $1 = 0 set if less than immediate slti $1, $2, 100 if ($2 < 100), $1 = 1 else $1 = 0 jump j 10000 PC = 10000* jump register jr $31 PC = $ jump and link jal 10000 $31 = PC + 4; PC = 10000*
5 problems, 5 pages Final Exam Solutions 9 December 2004
Problem 4 (3 parts, 26 points) Mixed Logic Design
Implement the following expressions to minimize total transistors (switches) required. Where two expressions are specified for a single part, your implementation should provide both outputs. Use proper mixed logic design technique. Any combination of Two, three, and four input AND, OR, NAND, NOR, and NOT gates may be used. Do not simplify the expression. Part A (6 points) OUTX = A ⋅ B + C ⋅ D + E ⋅ F
B C
E F
D OUTx
A
Part B (8 points) OUTY = A ⋅ B + C ⋅ D
A B
C
OUTy
D
Part C (12 points) OUTZ (^) 1 = A ⋅ B + C , OUTZ (^) 2 = B + C + D + E
A
B C
E
OUTZ
D OUTZ
5 problems, 5 pages Final Exam Solutions 9 December 2004
Problem 5 (3 parts, 30 points) Counters
Part A (10 points) Design a toggle cell using transparent latches and basic gates. Include a toggle enable TE, active low clear CLR, clocks PHI1 and PHI2. Label the output OUT.
out
φ 2
φ 1
In Out
En
Latch
In Out
En
Latch
Part B (10 points) Use toggle cells to build a divide by ten counter with active high inputs CE and CLR , and a max count output MAX. Do not draw the clock signals. Label all signals.
CEOut Clr
Toggle
O 0
O 1
O 2
CLR
CE
MAX
CEOut Clr
Toggle
CEOut Clr
Toggle
O 3
CEOut Clr
Toggle
Part C (10 points) Use divide by six and ten counters plus needed gates to build a stopwatch. Include an external count enable CE and clear CLR. Assume a one cycle/second (1 Hz) clock.
CE CLR
divide by 6 max CE CLR
divide by 10 max CE CLR
divide by 6 max CE CLR
divide by 10 max
CLR CE