Introduction to 8255, 8259, and 8254 Chips: A Comprehensive Guide, Study notes of Microprocessors

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DEEPAK.P

MICROPROCESSORS AND APPLICATIONS

Mr. DEEPAK P. Associate Professor ECE Department SNGCE 1

DEEPAK.P UNIT 4 2

Programmable

Peripheral Interface

[8255]

DEEPAK.P 4 19/9/

PPI 8255

It is an I/O port chip used for interfacing I/O devices with microprocessor. The parallel input-output port chip 8255 is also called as programmable peripheral input-output port. The Intel’s 8255 is designed for use with Intel’s 8-bit, 16-bit microprocessors.

PPI 8255

The port A lines are identified by symbols PA 0 - PA 7 while the port C lines are identified as PC 4 - PC 7. Similarly, Group B contains an 8-bit port B, containing lines PB0-PB7 and a 4-bit port C with lower bits PC0- PC3. All of these ports can function independently either as input or as output ports. This can be achieved by programming the bits of an internal register of 8255 called as control word register ( CWR ).

Block Diagram of 8255  (^) Two control groups, labeled group A control and group B control define how the three I/O ports operate.  (^) One of the 4 bit group is associated with group A control and the other 4 bit group with group B control device signals.  (^) The upper 4 bits of port C are associated with group A control while the lower 4 bits are associated with group B control. The final logic blocks are read/write control logic and data bus buffer.

Block Diagram of 8255 These blocks provide the electrical interface between the micro processor and 8255. The data bus buffer buffers the data I/O lines to/from the microprocessor data bus. The read/write control logic routes the data to and from the correct internal registers with the right timing.

Pin Diagram of 8255  (^) The 8255 is a 40 pin integrated circuit (IC), designed to perform a variety of interface functions in a computer environment.  (^) D0 - D7 These are the data input/output lines for the device.  (^) All information read from and written to the 8255 occurs via these 8 data lines.  (^) CS ( Chip Select Input ). If this line is a logical 0, the microprocessor can read and write to the 8255.  (^) RD ( Read Input ) Whenever this input line is a logical 0 and the CS input is a logical 0, the 8255 data outputs are enabled onto the system data bus.

Pin Diagram of 8255  (^) WR ( Write Input ) Whenever this input line is a logical 0 and the CS input is a logical 0, data is written to the 8255 from the system data bus  (^) A0 - A1 ( Address Inputs ) The logical combination of these two input lines determines which internal register of the 8255 data is written to or read from.  (^) RESET The 8255 is placed into its reset state if this input line is a logical 1. All peripheral ports are set to the input mode.

• Signals of
• Block Diagram of
• Pin Diagram of
• Pin Diagram of
• Control word Format of

Modes of 8255 There are 3 I/O modes of operation for the ports of 8255. Mode 0, Mode 1, and Mode 2 1) Mode 0 - Basic I/O mode 

2. Mode 1 - Strobed I/O mode 
3. Mode 2 - Strobed bi-directional I/O

Modes of 8255 Mode 0 Operation It is Basic or Simple I/O. It does not use any handshake signals. It is used for interfacing an i/p device or an o/p device. It is used when timing characteristics of I/O devices is well known