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4 problems, 4 pages Exam Three Solutions 21 April 2010
Problem 1 (3 parts, 30 points) Memory Systems
Part A (10 points) Consider a 256 Mbit DRAM chip organized as 32 million addresses of one
byte words. Assume both the DRAM cell and the DRAM chip is square. The column number
and offset concatenate to form the memory address. Using the organization approach discussed
in class, answer the following questions about the chip. Express all answers in decimal.
number of columns Sqrt(
28
14
= 16K
column decoder required ( n to m ) 14 to 16K
type of mux required ( n to m ) 2K to 1
number of muxes required 8
number of address lines in column number log 2
(16K) = 14
number of address lines in column offset log 2
(2K) = 11
Part B (10 points) Consider a one Gbyte memory system with 128 million addresses of eight
byte words using DRAM chips organized as 16 million addresses by 16 bit words.
word address lines for memory system log 2
(128M) = 27
chips needed in one bank 8/2 = 64/16 = 4
banks for memory system 128M/16M = 8
memory decoder required ( n to m ) 3 to 8
DRAM chips required 4 x 8 = 32
Part C (10 points) (10 points) Design a 96M address x 4 bit memory system using 32M address x
4 bit memory chips. Label all busses and indicate bit width. Assume R/W is connected and not
shown here. Use a decoder if necessary. Be sure to include the address bus, data bus, and MSEL.
32 M x 4
D 0
D 1
D 2
D 3
ADDR
CS
32 M x 4
D 0
D 1
D 2
D 3
ADDR
CS
ADDR
27
MSEL
D 0
D 1
D 2
D 3
32 M x 4
D 0
D 1
D 2
D 3
ADDR
CS
2 to 4
O 0
O 1
O 2
O 3 EN
25
25
25
25
2
A
A
I
I
A24:
4 problems, 4 pages Exam Three Solutions 21 April 2010
Problem 2 (3 parts, 25 points) Microcode
Using the supplied datapath, write microcode fragments to accomplish the following procedures.
Express all values in hexadecimal notation. Use ‘X’ when a value is don’t cared. For maximum
credit, complete the description field. ∩ means bitwise logical AND.
Part A (10 points) Use only registers 1 & 2.
R
2
R
1
R
1
# X Y Z rwe
im
en
im va
au
en
-a
/s
lu
en
lf
su
en
st
ld
en
st
en
r/
-w
msel description
1 1 X 2 1 1 FF 0 X 1 8 0 X 0 0 X 0 R2 <- R1 & 0xFF
2 1 X 1 1 1 8 0 X 0 X 1 1 0 0 X 0 R1 <- R1 / 256
3 1 2 2 1 0 X 1 0 0 X 0 X 0 0 X 0 R2 <- R1 + R
4 2 X 2 1 1 1 0 X 0 X 1 1 0 0 X 0 R2 <- R2 / 2
Part B (10 points) mem[0x100] = 0 - mem[0x100]. Use only registers 1, 2, & 3.
# X Y Z rwe
im
en
im va
au
en
-a
/s
lu
en
lf
su
en
st
ld
en
st
en
r/
-w
msel description
1 X X 1 1 1 100 0 X 1 C 0 X 0 0 X 0 R1 <- 100
2 1 X 2 1 0 X 0 X 0 X 0 X 1 0 1 1 R2 <- mem[R1]
3 X X 3 1 1 0 0 X 1 C 0 X 0 0 X 0 R3 <- 0
4 3 2 2 1 0 X 1 1 0 X 0 X 0 0 X 0 R2 <- 0 - R
5 1 2 X 0 0 X 0 X 0 X 0 X 0 1 0 1 mem[R1] <- R
Part C (5 points) Exchange R 1 and R 2
. Use only registers 1, 2 & 3.
# X Y Z rwe
im
en
im va
au
en
-a
/s
lu
en
lf
su
en
st
ld
en
st
en
r/
-w
msel description
1 1 2 1 1 0 X 0 X 1 6 0 X 0 0 X 0 R1 <- R1 xor R
2 1 2 2 1 0 X 0 X 1 6 0 X 0 0 X 0 R2 <- R1 xor R
3 1 2 1 1 0 X 0 X 1 6 0 X 0 0 X 0 R1 <- R1 xor R
4 problems, 4 pages Exam Three Solutions 21 April 2010
Part C (10 points) Build a three digit decimal counter (0 - 999) using three decade counters
drawn below. Use any basic gates you require. Assume clock inputs are already connected.
Ext CLR
Ext CE
CE
Out
Max
Count
Divide by 10
CLR
CE
Out
Max
Count
Divide by 10
CLR
CE
Out
Max
Count
Divide by 10
CLR
Problem 4 (2 parts, 15 points) Microcode
Part A (9 points) Consider the following input and output values for a shift operation. Determine
the shift type and amount required to achieve the listed transformation. I/Os are in hexadecimal.
Input Value Output Value Shift Type Shift Amount (signed decimal value)
rotate +12 or -20 bits
arith or logic -12 bits
87654321 FFFFFF
arith +
Part B (6 points) Consider the following input and output values for a logical operation.
Determine the logical function and function code (in hexadecimal) required for the operation.
X Input Y Input Output Logical Function Function Code
87654321 0000FFFF 0000FFFF
"Y" C
87654321 0000FFFF FFFFBCDE
NAND 7
