















































Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Community
Ask the community for help and clear up your study doubts
Discover the best universities in your country according to Docsity users
Free resources
Download our free guides on studying techniques, anxiety management strategies, and thesis advice from Docsity tutors
This lecture is part of lecture series on Information Technology course. This lecture includes: Memory Management Function, First in First Out Buffer, Fifo, Modes of Data Transfer, Direct Memory Access, Dma Controller, Multiprogramming, Modeling Multiprogramming, Names and Binding, Address Binding, Dynamic Relocation with a Base, Protection Using Base & Limit Registers, Address Space, Various Methods Used by Os, Swapping, Virtual Memory, Paging, Inverted Page Tables, Stack Algorithms, Segmentati
Typology: Slides
1 / 55
This page cannot be seen from the preview
Don't miss anything!
Memory Management ๏^ Ideally programmers want memory that is^ ๏^ large^ ๏^ fast^ ๏^ non volatile ๏^ Memory hierarchy^ ๏^ small amount of fast, expensive memory โ cache^ ๏^ some medium-speed, medium price main memory^ ๏^ gigabytes of slow, cheap disk storage ๏^ Memory manager handles the memory hierarchy
Multiprogramming with Fixed
Partitions ๏^ Fixed memory partitions^ ๏^ separate input queues for each partition^ ๏^ single input queue
Names and Binding
โ^ Symbolic Names: known in a context or path^ ๏^ file names, program names, printer/device names, user names โ^ Logical Names: used to label a specific entity^ ๏^ job number, major/minor device numbers, process id (pid), uid. โ^ Physical Names: address of entity^ ๏^ inode address on disk or memory^ ๏^ entry point or variable address^ ๏^ PCB address
Address Binding
๏^ Address binding^ ๏^ fixing a physical address to the logical address of a processโaddress space ๏^ Compile time binding^ ๏^ if program location is fixed and known ahead of time ๏^ Load time binding^ ๏^ if program location in memory is unknown until run-timeAND location is fixed ๏^ Execution time binding^ ๏^ if processes can be moved in memory during execution^ ๏^ Requires hardware support
Dynamic relocation with a base
register
๏^ Memory Management Unit (MMU) - dynamicallyconverts logical addresses into physical address ๏^ MMU contains base address register for running process
process
i Operatingsystem
Max addr^0
Max Mem
0 Physical memoryaddress
Relocation register for process
i^1000 +^ MMU Program generated address
Protection using base & limit
registers
๏^ Memory protection^ ๏^ Base register gives starting address for process^ ๏^ Limit register limits the offset accessible from therelocation register
base +
Physicaladdress^
memory register limitregister yes< no addressing^ error logicaladdress
Features of Memory Management^ ๏^ Relocation
Various Methods used by OS ๏ Swapping ๏ Virtual Memory ๏ Paging ๏ Segmentation
Swapping
๏^ Allocating space for growing data segment ๏^ Allocating space for growing stack & data segment
Memory Management with Bit Maps^ ๏
Part of memory with 5 processes, 3 holes^ ๏^ tick marks show allocation units^ ๏^ shaded regions are free ๏ Corresponding bit map ๏ Same information as a list
Managing memory with linked listsSearching the list for space for a new process^ ๏^ First Fit^ ๏^ Next Fit
โ^ Start from current location in the list ๏ Best Fit โ^ Find the smallest hole that will work โ^ Tends to create lots of really small holes ๏ Worst Fit โ^ Find the largest hole โ^ Remainder will be big ๏ Quick Fit โ^ Keep separate lists for common sizes
Virtual Memory
๏^ Virtual Memory^ โ
Separation
of^ user
logical
memory
from
physical
memory. โ Only^ PART
of the program needs to be in memory for execution. โ Logical address space can be much larger than physicaladdress space. โ Need to allow pages to be swapped in and out. ๏^ Virtual Memory can be implemented via^ ๏^ Paging^ ๏^ Segmentation