Semiconductor Memories: Understanding Types, Memory Terminology, and Operating Principles, Exams of Electronics

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Semiconductor

Memories

Introduction

 (^) Semiconductor memory is an electronic storage device, often used as computer memory, implemented on a semiconductor based integrated circuit.  (^) Examples of Semi conductor memories are non-volatile memory such as ROM, RAM and Flash memory and so on.  (^) These memories can be constructed to store large amount of data entirely within a computer system.  (^) The number of locations and the size of storing data may vary from memory to memory. Each location is called a memory cell.

 Read operation: the operation whereby the binary word stored in a specific memory location is sensed and then transferred to another device.  (^) Write operation: the operation whereby a new word is placed into a particular memory location.  (^) Access time: amount of time required to perform a read operation.  (^) Random Access Memory (RAM): memory in which the actual physical location of memory word has no effect on how long it takes to read from or write into that location.

Memory Terminology

 Volatile memory: any type of memory that requires the application of electrical power in order to store information.  (^) Sequential Access Memory: a type of memory in which the access time is not constant but varies depending on the address location.  (^) Read/Write Memory: any memory that can be read from and written into with equal ease.  (^) Read-Only Memory(ROM) Designed to hold data that either are permanent or will not change frequently.

Memory Terminology

Classification

Storage

 The process of entering the data into a ROM is called programming.  Mask programming : The device has its pattern programmed as part of the manufacturing process and is also known as mask programming.  Once programmed, its contents can never be changed. Because of this fact and the cost for making the programming masks, ROMs are used mainly in high-volume applications where the data will not change.

Programming ROMs

EPROM programming

TECHNOLOGY

 In the EPROM technology, EPROM cells are used to control program connections.  A transistor with two gates – a floating gate and a control gate is used to create an EPROM cell.  The pull up resistor connects the drain of the transistor to the power supply.

EPROM programming unit

and erasing unit

SRAM programming

TECHNOLOGY

 The SRAM cell is connected to the gate of the pass transistor.  When the SRAM cell content is 0, the pass transistor is OFF, hence no connection exists.  A closed path can be achieved by turning the pass transistor ON by making the SRAM content to 1.  Advantage : Reprogrammable  Disadvantage : Occupy more space

operating principles for ROM

ROM - Timing diagrams for read operation

Operating Modes - ROM

 (^) With CE = HIGH, the chip is in its low-power standby mode, in which no operations are being performed on any m/y location and the data pins are in the Hi-Z state.  (^) Read operation  (^) To read the contents of a memory location, the desired address is applied to the address pins; CE is driven low, and the output enable pin, OE is driven low to enable the chip’s output data buffers. The WE pin is held high during a read operation.  (^) Write operation  (^) To write into (program) a memory location, the output buffers are disabled so that the data to be written can be applied as inputs to the I/O pins.  (^) As shown, prior to t1, the device is in the standby mode. A new address is applied at that time.

Contd…

 (^) At t2, the CE and WE inputs are driven low to begin the write operation; OE is high so that the data pins will remain in the HI-Z state.  (^) Data are applied to the I/O pins at t3 and are written into the address ;location on the rising edge of WE at t4.  (^) The data are removed at t5.  (^) Actually, the data are first latched into a FF buffer memory.  (^) The data are held there while other circuitry on the chip performs an erase operation on the selected address location in the EEPROM array, after which the data byte is transferred from the buffer to the EEPROM array and stored at that location.  (^) This erase and store operation typically takes 5ms.  (^) With CE returned HIGH at t4, the chip is back in the standby mode while the internal erase and store operations are completed.