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digital sstudy and systems, Schemes and Mind Maps of Digital Electronics

the main content tells us about the digital system design and ather theory beind the buildiung of macu9nes

Typology: Schemes and Mind Maps

2020/2021

Uploaded on 08/19/2023

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Digital Electronics Lab Record Sheets
Jan 2023
Date of Experiment| Faculty Signature|Dr Binu Paul/Dr Indu I
EC|SOE|CUSAT
Experiment no: 14.a
Latches/ FLIP FLOPS
AIM:
To implement a RS Latch .
COMPONENTS REQUIRED:
IC 7400, 7402,7404
DESIGN :
The design of such a latch includes two inputs, called the SET [S] and RESET [R]. There
are also two outputs, Q and Q’.
RS LATCH
( Draw the logic circuit for the RS Latch using NOR also )
Write the verified Truth tables
RESULT
RS latches are implemented and output is verified with the truth table.
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Jan 2023 Date of Experiment| Faculty Signature|Dr Binu Paul/Dr Indu I Experiment no: 14 .a

Latches/ FLIP FLOPS

AIM:

To implement a RS Latch. COMPONENTS REQUIRED: IC 7400, 7402, DESIGN : The design of such a latch includes two inputs, called the SET [S] and RESET [R]. There are also two outputs, Q and Q’. RS LATCH ( Draw the logic circuit for the RS Latch using NOR also ) Write the verified Truth tables RESULT RS latches are implemented and output is verified with the truth table.

Jan 2023 Date of Experiment| Faculty Signature|Dr Binu Paul/Dr Indu I Experiment no: 14.b

J-K FLIP FLOP

AIM :

To design J-K flip flop using NAND gate. COMPONENTS REQUIRED:

  • IC 7400, TRUTH TABLE THEORY: Explain in your words RESULT: Designed the circuit and verified the result.

J K Q Q’