Digital Design Final Exam 2018 | Exams Literature

CSE315/3017!Final!Exam.!Open!Notes&books.!Cell!phones/calculators!are!forbidden.!Give!necessary!

expression!for!your!answers.!Show!your!own!effort!!!!!!!!!!!!!!!!!!!!!!!Date:!3.1.18!

1.!The!setup!given!below!can!be!employed!to!measure!the!capacitance!value!(C)! (R!is!known).!If!t=τ=RC!

the!amptilude!value!of!Vc(τ)!will!be!V0(1-e-1)!which!is!%65!of!V0.!Hence!the!time!‘t’!value!should!be!read!

when!the!!Vc(t)!amplitude!reaches!to!0.65V0.!Capacitance!value!can!simply!be!calculated!by!the!following!

expression:!C!=!τ/R.!!!!

a) Design! a! circuit! which! has! an! analog! input! (Vc(t))! and! two! digital! outputs(a! and! b).! Choose! all!

necessary! components! and! their! parameters.! The$required$ circuit$ does$ not$include$ a$ finite$ state$

macine.!The!output!‘a’!should!be!logic1!if!t>!τ!otherwise!it!is!zero.!The!output!‘b’!is!logic1!when!the!

input!Vc(t)!is!close!to!zero.!(20!pts)!

b) Propose!a!method!to!measure!the!capacitance!using!the!information!provided! by! output! ‘a’! and!

output!‘b’.(10!pts)!

c) Which!parameters!in!your!design!effect!the!sensitivity!of!the!measurment?!(10!pts)!

d) Design!a!sequetial!circuit!to!measure!the!capacitance!value.!The!inputs!are!signal!‘a’!and!signal!‘b’;!

the!8-bit! output! will!give!a! binary!value!that!is! proportional!to!the! capacitance! value.!Determine!

the!constant!of!proportionality.!(25!pts)!

2.!Design!an!alghorimic!state!machine!that!counts!the!Fibonacci!numbers!(Fn+2=Fn+Fn+1).!The!current!

number!is!found!by!the!sum!of!two!previous!numbers!(1,1,2,3,5,8,13,...).!!

a) Define!the!necessary!blocks!and!their!inputs!and!outputs.!Express!the!function!of!each!block!(10!

pts)!

b) Determine!the!alghoritm!that!uses!these!blocks,!plot!the!flowchart.!(15!pts)!

c) Design!the!finite!state!machine!that!realizes!the!designed!alghoritm.!(20!pts)!

3.!Let’s!suppose! that! you! have! two! inputs!on!FPGA!GPIO’s.!One! is! for! ‘a’! and! other!one!is!for! ‘b’.! Write! a!

program!that!calculates!the! time!interval! between!a! and!b.! (First!as!soon!as!!‘a’!becomes!‘1’,!your!counter!

should!start!counting!then!it!counts!until!b=1.!)!Thereafter!you!should!write!a!Seven!Segment!Module!that!

writes!the!elapsed!time!(units!will!be!measured!in!ms)!on!your!seven! segment!then!call!this!module! in!an!

appropriate!way.!(For$example$give$each$digit$as$input$parameter$with$modulus$‘%’$operation.$You$can$make$

mathematical$operations$among$register$values$in$FPGA$such$as$‘+’,’-’,’/’$)$(20$pts)$

4.!Write!a!simplified!sum!of!products!expression!for!the!boolean!function!F(A,B,C,D)=!(A>B)+(C>D),!and!!

a)! implement! it! using! one! 4×1! multiplexer! (without! enable! input)! and! minimum! number! of! additional!

gates.!(8!pts)!

b)!implement!it!using!a!decoder!and!an!OR!gate.!(8!pts)!

c)!design!a!ROM!device!to!implement!it.!(Use!the!ROM!structure!that!contains!a!decoder)!(8!pts)!

(Note:!(A>B)!is!1!if!A>B,!and!0!otherwise.!For!example!(1>0)=1,!(1>1)=0)!!!

5.!Choose!an!experiment!from!our!LAB!section.!Then!explain!what!you!do!in!order!to!complete!it,!give!

enough!detail!(item!by!item).!(10!pts)!

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CSE315/3017 Final Exam. Open Notes&books. Cell phones/calculators are forbidden. Give necessary expression for your answers. Show your own effort! Date: 3.1.

The setup given below can be employed to measure the capacitance value (C) (R is known). If t=τ=RC

the amptilude value of Vc(τ) will be V 0 (1-e-^1 ) which is %65 of V 0. Hence the time ‘t’ value should be read

when the Vc(t) amplitude reaches to 0.65V 0. Capacitance value can simply be calculated by the following expression: C = τ/R. a) Design a circuit which has an analog input (Vc(t)) and two digital outputs(a and b). Choose all necessary components and their parameters. The required circuit does not include a finite state macine. The output ‘a’ should be logic1 if t> τ otherwise it is zero. The output ‘b’ is logic1 when the input Vc(t) is close to zero. (20 pts) b) Propose a method to measure the capacitance using the information provided by output ‘a’ and output ‘b’.(10 pts) c) Which parameters in your design effect the sensitivity of the measurment? (10 pts) d) Design a sequetial circuit to measure the capacitance value. The inputs are signal ‘a’ and signal ‘b’; the 8-bit output will give a binary value that is proportional to the capacitance value. Determine the constant of proportionality. (25 pts)

Design an alghorimic state machine that counts the Fibonacci numbers (Fn+2=Fn+Fn+1). The current number is found by the sum of two previous numbers (1,1,2,3,5,8,13,...). a) Define the necessary blocks and their inputs and outputs. Express the function of each block ( 10 pts) b) Determine the alghoritm that uses these blocks, plot the flowchart. (15 pts) c) Design the finite state machine that realizes the designed alghoritm. (20 pts)
Let’s suppose that you have two inputs on FPGA GPIO’s. One is for ‘a’ and other one is for ‘b’. Write a program that calculates the time interval between a and b. (First as soon as ‘a’ becomes ‘1’, your counter should start counting then it counts until b=1. ) Thereafter you should write a Seven Segment Module that writes the elapsed time (units will be measured in ms) on your seven segment then call this module in an appropriate way. (For example give each digit as input parameter with modulus ‘%’ operation. You can make mathematical operations among register values in FPGA such as ‘+’,’-’,’/’ ) (20 pts)
Write a simplified sum of products expression for the boolean function F(A,B,C,D)= (A>B)+(C>D), and a) implement it using one 4×1 multiplexer (without enable input) and minimum number of additional gates. (8 pts) b) implement it using a decoder and an OR gate. (8 pts) c) design a ROM device to implement it. (Use the ROM structure that contains a decoder) (8 pts) (Note: (A>B) is 1 if A>B, and 0 otherwise. For example (1>0)=1, (1>1)=0)
Choose an experiment from our LAB section. Then explain what you do in order to complete it, give enough detail (item by item). (10 pts)

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the amptilude value of Vc(τ) will be V 0 (1-e-^1 ) which is %65 of V 0. Hence the time ‘t’ value should be read