Docsity
Docsity

Prepare for your exams
Prepare for your exams

Study with the several resources on Docsity


Earn points to download
Earn points to download

Earn points by helping other students or get them with a premium plan


Guidelines and tips
Guidelines and tips

Implementing Logic Functions using NAND and NOR Gates, Study notes of Engineering

How to implement any logic function using NAND and NOR gates by converting the logic function to Sum of Product (SOP) or Product of Sum (POS) form and then implementing it using NAND or NOR gates respectively. The document also covers the realization of logic gates using NAND and NOR gates and the process of converting multilevel circuits to NAND and NOR gates.

Typology: Study notes

2017/2018

Uploaded on 01/21/2022

succour
succour 🇮🇳

4.5

(12)

63 documents

1 / 5

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
LECTURE-3
NAND AND NOR IMPLEMENTATION
Any logic function can be implemented using NAND and NOR gates.
To achieve this, first the logic function has to be written in Sum of Product (SOP) form. Once
logic function is converted to SOP, then is very easy to implement using NAND gate. In
other words any logic circuit with AND gates in first level and OR gates in second level can
be converted into a NAND-NAND gate circuit.
!
Consider the SOP expression: F = W.X.Y + X.Y.Z + Y.Z.W
!
The above expression can be implemented with three AND gates in first stage and one OR
gate in second stage as shown in figure.
If bubbles are introduced at AND gates output and OR gates inputs (the same for NOR
gates), the above circuit becomes as shown in figure.
pf3
pf4
pf5

Partial preview of the text

Download Implementing Logic Functions using NAND and NOR Gates and more Study notes Engineering in PDF only on Docsity!

LECTURE-

NAND AND NOR IMPLEMENTATION

Any logic function can be implemented using NAND and NOR gates. To achieve this, first the logic function has to be written in Sum of Product (SOP) form. Once logic function is converted to SOP, then is very easy to implement using NAND gate. In other words any logic circuit with AND gates in first level and OR gates in second level can be converted into a NAND-NAND gate circuit. Consider the SOP expression: F = W.X.Y + X.Y.Z + Y.Z.W The above expression can be implemented with three AND gates in first stage and one OR gate in second stage as shown in figure. If bubbles are introduced at AND gates output and OR gates inputs (the same for NOR gates), the above circuit becomes as shown in figure.

Now replace OR gate with input bubble with the NAND gate. Now we have circuit which is fully implemented with just NAND gates.

Realisation Of Logic Gates using NAND gates

Multilevel NAND Circuits

  • Convert all AND gates to NAND gates with AND-NOT graphic symbols. -Convert all OR gates to NAND gates with NOT-OR graphic symbols. -Check all the bubbles in the diagram. For every bubble that is not counteracted by another bubble along the same line, insert a NOT gate or complement the input literal from its original appearance

Multilevel NOR Circuits

Starting from a multilevel circuit: -Convert all OR gates to NOR gates with OR- NOT graphic symbols. -Convert all OR gates to NOR gates with NOT- AND graphic symbols. -Check all the bubbles in the diagram. For every bubble that is not counteracted by another bubble along the same line, insert a NOT gate or complement the input literal from its original appearance.