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Computer Development-Advance Computer Architecture-Lecture Slides, Slides of Advanced Computer Architecture

This course focuses on quantitative principle of computer design, instruction set architectures, datapath and control, memory hierarchy design, main memory, cache, hard drives, multiprocessor architectures, storage and I/O systems, computer clusters. This lecture includes: Quatntitative, Principles, Laws, Princilples, Performance, Producer, Queue, server, Buffer

Typology: Slides

2011/2012

Uploaded on 08/06/2012

amrusha
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Today’s Topics
Module 1: Introduction
Module 2: Instruction Set Architecture
Module 3: Computer hardware design
Module 4: Instruction Level Parallelism Dynamic
Module 5: Instruction Level Parallelism Static
Module 6: Memory Hierarchy system
Module 7: Multiprocessing
Module 8: I/O Systems
Module 9: Networks and Clusters
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Today’s Topics

 Module 1: Introduction

 Module 2: Instruction Set Architecture

 Module 3: Computer hardware design

 Module 4: Instruction Level Parallelism Dynamic

 Module 5: Instruction Level Parallelism Static

 Module 6: Memory Hierarchy system

 Module 7: Multiprocessing

 Module 8: I/O Systems

 Module 9: Networks and Clusters

Module 1:

Introduction and Quantitative Principles

We started this course distinguishing the computer organization and computer architecture

Architecture refers to those attributes of a computer visible to the programmer or compiler writer; e.g.,

instruction set, memory addressing techniques, I/O mechanisms etc.

Module 1: Introduction ….

Computer Development

We also introduced the computers developments with academic and commercial perspectives

Academically, modern computer developments have their infancy in 1944-49,

when John von Neumann introduced the concept of stored-program computer, referred to as Electronic Discrete Variable Automatic Computer EDVAC

Module 1: Introduction ….

Computer Development

Commercially, the first machine was built by Eckert-Mauchly Computer Corporation in 1949

In 1971, Intel introduced first cheep microprocessor 4004 and then 80 x 86 series

In 1998, more than 350 million microprocessors with different instruction set architectures were in use; this number has risen to more than a billion in 2006

Module 1: Quantitative Principles

The key to the quantitative analysis in determining the effectiveness of the entire computing system is the computer hardware and software performance

In this respect , we discussed:

 Price-performance design  CPU performance metrics  CPU benchmark suites

Module 1: Price-Performance Design

The issue of cost-performance is complex one

At one extreme, high-performance computers designer may not give importance to the cost in achieving the performance goal.

At the other end, low-cost designer may sacrifice performance to some extent.

The price-performance design lies between these extremes where the designer balances cost and hence price verses performance.

Module1: CPU Benchmark Suites

Five levels of programs are used as benchmarks:

1. Real Applications scientific programs evaluate the performance of a machine 2. Modified Applications the real applications with certain blocks modified to focus desired aspects of application, 3. Kernels the small key pieces extracted from the real program 4. Toy benchmarks small codes normally used as beginning programming assignments. 5. Synthetic benchmarks the small section of Artificially created program

Module1: Quantitative Principles of

Performance Measurement

Quantitatively the performance of a system can be enhanced by speedup of a fraction of system based on the concept of the common case first

Amdahl’s Law is the basis of the measure of the performance enhancement

which defines the Speedup due to enhancement E that accelerates a fraction F of the task as:

Module 2:

Instruction Set Architecture

The three pillars of computer architecture are:

 hardware,  instruction set  software

Hardware facilitates to run the software and instruction set is the interface between the hardware and software

While talking about the Instruction set architecture the focus of our discussion has been:

Module 2:

Instruction Set Architecture

 ISA Taxonomy

 Types of operands

 Types of operations

 Memory Addressing modes

Module 2: Types of Operands and Operations

Operands Types:

Integer, FP and Character

Operand Size

Half word, word, double word

Classification of operations

Arithmetic, data transfer, control

and support operations

Module 2: Types of Operands addressing

modes

Operand Addressing Modes

Immediate, register, direct (absolute) and Indirect

Classification of Indirect Addressing

Register, indexed, relative (i.e. with displacement) and memory

Special Addressing Modes

Auto-increment, auto-decrement and scaled

Control Instruction Addressing modes

Branch, jump and procedure call/return

Data Path

CONTRO

Sub-systems of Central Processing Unit

  • Datapath: the path that facilitates the transfer of information from one part (register/memory/ IO) to the other part of the system
  • Control: the hardware that generates signals to control the sequence of steps and direct the flow of information through the datapath

At a “higher level” a CPU can be viewed as consisting of two sub-systems

Module 3: Datapath Implementations

The datapath is the arithmetic organ of the

Von- Neumann’s stored - program

organization

Typically, the datapath may be implemented

as:

  • Unibus structure
  • 2-bus structure
  • 3-bus structure

Based on the concepts of single cycle,

multiple cycle and pipelined architecture