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CMOS ANALOG IC DESIGN
Lecture Notes
M.TECH(VLSI & ES)
(I YEAR – I SEM)
Prepared by
Dr.C.Ravishankar Reddy, Professor
MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY
(Autonomous Institution – UGC, Govt. of India)
Department of Electronics and Communication Engineering
Recognized under 2(f) and 12 (B) of UGC ACT 1956 (Affiliated to JNTUH, Hyderabad, Approved by AICTE-Accredited by NBA &NAAC–‘A’Grade-ISO9001: Certified) Maisammaguda,Dhulapally(PostVia.Kompally),Secunderabad–500100,Telangana State, India
ELECTIVE-I
CMOS ANALOG IC DESIGN
Course Objectives:
To provide in-depth understanding of different types of MOS devices and modeling techniques To understand and design the operation of current mirror circuits
To demonstrate the analysis and design of amplifiers using CMOS To design a various stages of Operational amplifiers using CMOS devices.
Design and construct the open loop and discrete time comparators using op-amp.
UNIT – I
MOS Devices and Modeling:
The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout, CMOSDevice Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small-Signal Model forthe MOS Transistor, Computer Simulation Models, Sub-threshold MOS Model.
UNIT – II
Analog CMOS Sub-Circuits:
MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors- Currentmirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current Mirror, Current andVoltage References, Band gap Reference.
UNIT – III
CMOS Amplifiers
Inverters, Differential Amplifiers, Cascode Amplifiers, Current Amplifiers, Output Amplifiers, High Gain Amplifiers Architectures.
UNIT – IV
CMOS Operational Amplifiers
Design of CMOS Op Amps, Compensation of Op Amps, Design of Two-Stage Op Amps, Power-Supply Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps, Measurement Techniques of OPAmp.
UNIT – V Comparators Characterization of Comparator, Two-Stage, Open-Loop Comparators, Other Open-Loop Comparators, Improving the Performance of Open-Loop Comparators, Discrete-Time Comparators.
UNIT - I
MOS Devices and Modeling
MOS Transistor:
A MOS transistor is primarily a switch for digital devices. Ideally, it works as follows:
If the voltage at the gate electrode is "on" , the transistor is "on", too, and current flow between the source and drain electrodes is possible (almost) without losses.
If the voltage at the gate electrode is "off", the transistor is "off", too, and no current flows between the source and drain electrode.
The most basic element in the design of a large scale integrated circuit is the transistor. For the processes this type of transistor available is the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET). These transistors are formed as a sandwich'' consisting of a semiconductor layer, usually a slice, or wafer, from a single crystal of silicon; a layer of silicon dioxide (the oxide) and a layer of metal. These layers are patterned in a manner which permits transistors to be formed in the semiconductor material (thesubstrate''); a diagram showing a typical (idealized) MOSFET is shown in Figure. Silicon dioxide is a very good insulator, so a very thin layer, typically only a few hundred molecules thick, is required. Actually, the transistors which we will use do not use metal for their gate regions, but instead use polycrystalline silicon (poly). Polysilicon gate FET's have replaced virtually all of the older devices using metal gates in large scale integrated circuits. (Both metal and polysilicon FET's are sometimes referred to as IGFET's --- insulated gate field effect transistors, since the silicon dioxide under the gate is an insulator. We will still continue to use the term MOSFET to refer to polysilicon gate FET's.)
Passive Components- Capacitor & Resistor :
Integrated circuit Layout:
Y path technique
CMOS Device Modeling:
Simple MOS Large-Signal Model:
