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Information about the autumn examinations in 2007/2008 for second year students in electronic engineering and electronic & computer engineering. Exam codes, module codes, instructions, requirements, and questions for various topics such as semiconductors, transistors, jfets, op-amps, and meters. Students are required to attempt all questions in section a and any three questions in section b. The duration of the exam is 3 hours.
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Exam Code(s) 2BP121, 2BN Exam(s) Second Year Electronic Engineering Second Year Electronic & Computer Engineering Module Code(s) EE Module(s) Analogue Systems Design 1 Paper No. Repeat Paper Yes External Examiner(s) Professor P. Cheung Internal Examiner(s) Professor G. O Laighin Mr Rob Mc Feely Mr Frank Callaly
Section A: Attempt all questions (carries 40 marks) Section B: Attempt 3 of 5 questions (each question carries 20 marks) Duration 3hrs No. of Pages 7 (including cover page) Department(s) Electronic Engineering Course Co-ordinator(s) Mr. Rob McFeely, Mr Frank Callaly Requirements : MCQ Handout Statistical Tables Graph Paper Log Graph Paper Other Material
1. (a) Describe, with the aid of a diagram, the formation of a depletion region at a semiconductor P-N junction. [3 marks] (b) Sketch the I-V characteristic curve for a real diode and explain how it differs from that of an ideal diode [2 marks] 2. (a) Sketch the I-V characteristic curve for a zener diode, indicating the forward-biased, reverse-biased and breakdown regions of operation. [3 marks] (b) State one advantage and one disadvantage of using a germanium diode instead of a silicon diode. [2 marks] 3. (a) Name the 3 main operating modes of an NPN Bipolar Junction Transistor. [3 marks] (b) Clearly explain the purpose of biasing a transistor. [2 marks] 4. Describe, with the aid of a diagram, the semiconductor make-up of an N-channel Junction Field Effect Transistor (JFET). [5 marks] 5. (a) Draw an illustrated diagram of a N-channel depletion MOSFET. [2 marks] (b) Describe its operation of a N-channel depletion MOSFET in depletion mode. [3 marks] 6. (a) List and detail 3 reasons why an Op-Amp has close to Ideal characteristics for an amplifier [3 marks] (b) Draw an illustrated diagram of a Unity Gain Buffer [2 marks] 7. (a) Describe, with the aid of a diagram, the operation of a moving coil meter [3 Marks] (b) Show using a diagram how a moving coil meter can be used to measure voltage [2 Marks] 8. Describe the function and operation of either the vertical/horizontal deflection plates used in the Cathode Ray Oscilloscope. [5 marks]
2. (a) Calculate the following properties for the emitter follower circuit shown in Figure3: (i) open circuit gain [3 marks] (ii) input resistance [3 marks] (iii) output resistance [3 marks] (b) Using the values calculated in part (a), draw the box model of the circuit shown in Figure3. [3 marks] (c) Using the box model from part (b), with the source and load connected: (i) Calculate the overall system gain Asys. [4 marks] (ii) Plot two periods of the output voltage vo(t), for a source voltage of vs(t)=0.8Sin(50πt)V [4 marks] Figure 3. BJT Emitter Follower Circuit
3. (a) Complete the following in relation to an N-Channel D-MOSFET (Depletion Mode – Metal Oxide Field Effect Transistor) (i) Write the Shockley equation describing drain current flowing in the MOSFET. [2 marks] (ii) Draw a detailed diagram of the MOSFETs transfer characteristic curves. [4 marks] (b) Determine the drain source saturation current ( I^ DSS ) and the pinch off voltage for the circuit shown in figure 4 given that the drain current is 10 mA (^) for a gate source voltage (^ VGS^ )of 0 V (^). When VGS^ ^4 V the drain current is 1.1 mA^. Proceed to determine the output voltage ( VOUT^ ). [9 marks] Figure 4. Depletion Mode MOSFET (c) Describe with the aid of a circuit diagram the operation of a Complimentary MOS (CMOS) inverter [5 marks]
5. (a) Draw a diagram of how a moving coil meter can be used to build a multi-range voltmeter. [4 marks] (b) Describe, using diagrams where necessary the function of the trigger section in a Cathode Ray Oscilloscope [6 marks] (c) Answer the following in relation to the strain gauge bridge circuit in Fig 6(a) Figure 6 (a) Strain Gauge Bridge Circuit (i) Write an expression for the output voltage as a function of R^ , R and VB^. [3 marks] (ii) Calculate the percentage linearity error for R^ ^2 k ^ and R^ ^5 [3 marks] (iii) Draw a bridge circuit with zero linearity error and give an expression for its output voltage [4 marks]