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Analog-to-Digital Converters: Principles, Applications, and Selection, Lecture notes of Electronics

A comprehensive overview of analog-to-digital converters (adcs), covering their fundamental principles, working mechanisms, and various applications. It delves into the conversion process, including sampling, quantization, and encoding, highlighting key concepts like resolution, nyquist criterion, and aliasing. The document also explores different types of adcs, their characteristics, and selection criteria for specific applications. It further examines the role of adcs in data acquisition, control systems, sensor integration, and various technological domains like cell phones, audio devices, and video devices.

Typology: Lecture notes

2024/2025

Uploaded on 03/11/2025

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Download Analog-to-Digital Converters: Principles, Applications, and Selection and more Lecture notes Electronics in PDF only on Docsity!

Analog-Digital Converters

What is ADC?

 Definition

 Examples of use

 Conversion process

 Accuracy

 Characteristics of ADC in MC9S12C

 Application and Selection of ADC

Measurement and Control Loop If you want to measure a signal, the analogue signal is first converted into digital form and then converted back into analogue

What is ADC?

 ADC (Analog to Digital Converter) is an electronic device that converts a continuous analog input signal to discrete digital numbers (binary)  Analog  Real world signals that contain noise  Continuous in time  Digital  Discrete in time and value  Binary digits that contain values 0 or 1

Why is ADC Important?

 All microcontrollers store information using digital logic  Compress information to digital form for efficient storage  Medium for storing digital data is more robust  Digital data transfer is more efficient  Digital data is easily reproducible  Provides a link between real-world signals and data storage

How ADC Works 2 Stages:  Sampling  Sample-Hold Circuit  Aliasing  Quantizing and Encoding  Resolution Binary output

Sampling

Simple Sample and Hold Circuit Response of Sample and Hold Circuit x(t) xs(t=k*Ts) Ts  Reduction of a continuous signal to a discrete signal  Achieved through sampling and holding circuit  Switch ON – sampling of signal (time to charge capacitor w/ Vin)  Switch OFF - voltage stored in capacitor (hold operation)  Must hold sampled value constant for digital conversion x(t) t Ts xs(t)

Aliasing

 High and low frequency samples are indistinguishable

 Results in improper conversion of the input signal

 Usually exists when Nyquist Criterion is violated

 Can exist even when:

 Prevented through the use of Low-Pass (Anti-aliasing) Filters

fs  2  f max

Quantizing and Encoding

 Approximates a continuous range of values and replaces it with a binary number  Error is introduced between input voltage and output binary representation  Error depends on the resolution of the ADC

The signal can only take determined values Belonging to a range of conversion ( ΔVr )  Based on number of bit combinations that the converter can output  Number of possible states: N= 2 n where n is number of bits  Resolution: Q= ΔVr/N Conversion process: Quantization t Ts xs(t) ΔVr Q xq(t)

Example

  • 8 bits converter: n=
  • Range of conversion: ΔVr=5V
  • Sampling time: Ts=1ms

Analog

Digital

  • Number of possible states: M= 8 =
  • Resolution: Q=ΔVr/M=19.5 mV
  • Analog Filter: ffilter ≈ fs/5 = 200 Hz f Gain

Resolution

n

resolution Vrange

3

V V

n

Vrange V

 Maximum value of quantization error

 Error is reduced with more available memory

Example:

Vrange=Input Voltage Range n= # bits of ADC

Resolution

V

Qerror resolution

Resolution

Quantisation levels is defined as: where Nq = quantisation levels; and n is the number of bits. Resolution is defined as: where RADC is the resolution of the ADC; L is the full-scale range of the ADC Quantisation generates an error, because the digitised signal is only sampled from the original analogue signal. The maximum possible error occurs when the true value of the analogue signal is on the borderline between two adjacent quantisation levels, in which case the error is half the quantisation-level spacing; this gives us the following for quantisation error ( Quanerr ): where RADC is the resolution of the ADC. ADC Quanerr R 2 1 =  1 2 − 1 = − = n q ADC L N L R