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Lecture Notes of Memristor models
Typology: Exercises
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Examensarbete utfört i Elektroteknik vid Tekniska högskolan i Linköping av
LiTH-ISY-EX—11/4455--SE Linköping 2014
Figure 24: The symbol and typical curve of a memristor (adapted and redrawn with permission from [5], copyright © 2003 IEEE). ........................................................................................................................................................................................................ 39
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Figure 46: The periodic table, showing the materials for the top and bottom electrodes as well as the transition metal-oxide materials used in ReRAM structures. The elements in blue are the candidates for the electrodes. The red and green elements are binary oxides and the ternary oxides (perovskite type) respectively (reprinted with permission from [59])............................. 69
Figure 47: The structure of TiO2-based memristor developed by HP Labs................................................................................... 70
Figure 48: Rutile TiO2 lattice structure (adapted from [144], public domain photo)....................................................................... 70
Figure 49: Cross section view from fabrication steps of the TiO2 memristor array fabricated by Kavehei et al. [59]. (a) SiO2/Si substrate preparation, (b) coating photoresist, (c) after patterning, exposure and development the initial section of the array is formed, (d) Pt deposition, (e) patterning of the Pt electrodes onto the substrate through a lift-off process by rinsing it in acetone, (f) TiO2 deposition, (g) photolithography for TiO2 etching, (h) patterning of the photoresist, (i) TiO2 etching, (j) deposition of the top Pt electrode and removing the unwanted sections by the same lift-off process done for bottom electrodes (reprinted with permission from [59])...................................................................................................................................................................... 71
Figure 50: Cross section view of the memristor based on Ag and ITO electrodes fabricated by Kavehei et al. [59]. ITO is deposited on the glass substrate as the bottom electrode and Ag is the top electrode (reprinted with permission from [59])....... 72
Figure 51: The anodic titania memristor sample made on a titanium film (reprinted with permission from [72])............................ 73
Figure 52: Schematic of a spin valve/magnetic tunnel junction. The middle layer (dark green) is the spacer layer in the spin valve, and insulating in magnetic tunnel junctions. The blue region is the fixed layer and the light green region is the free layer. (a) the high resistance state, (b) the low resistance state (adapted and redrawn from [82], which is free to share under the Creative Commons Attribution-Share Alike 3.0 Unported license)................................................................................................. 74
Figure 53: Structure of the M/a-Si/p-Si device. (a) Cross section view of the SEM image of the structure. SiO2 layer is used to protect the regions outside the active area. (b) schematic view of the way a conductive filament is formed from the top to bottom electrode in ON state and retracts back in OFF state (reprinted with permission from [78]. Copyright 2008 American Chemical Society)........................................................................................................................................................................................... 75
Figure 54: I-V characteristic of the rectifying memristor model. (reprinted by permission from Macmillan Publishers Ltd: Applied Physics Letter, copyright 2010 [79])............................................................................................................................................... 76
Figure 55: The schematic of the organic memristor developed by Stewart et al. (redrawn and reprinted with permission from [81], Copyright 2004 American Chemical Society)......................................................................................................................... 77
Figure 56: Flexible polymer sheet that includes 4 rewritable flexible TiO2 memory devices with cross-bar aluminum contacts. A small schematic of the structure is illustrated in the corner (reprinted with permission from [38] copyright ©2009 IEEE)............. 77
Figure 57: The taxonomy of memristor applications (redrawn and adapted with permission from [141], copyright ©2012 IEEE). 78
Figure 58: Schematic illustration of the connectivity of the crossbar structure (redrawn and adapted from [90], Photo credit: Bryan Christie Design).................................................................................................................................................................... 82
Figure 59: Crossbar structure consisting of over-crossing nanowires, with memristor switches in each crosspoint..................... 82
Figure 60: The first CMOS/Memristor reconfigurable hybrid chip made by Xia et al. [70] at HP Labs. (a) Schematic illustration of the hybrid circuit with both CMOS and switching layers (b) The hybrid chip image (the top layer is the memristor switching layer). On the top right side, there is an SEM image of a piece of memristor crossbar array (reprinted with permission from [70], copyright 2009 American Chemical Society).................................................................................................................................. 82
Figure 61: The Hudgin-Huxley Neuron Model (adapted and redrawn from [151])......................................................................... 84
Figure 62: A schematic of the main computer components involved in a fetch and store operation. The operations that must be done in order to model how an individual synapse work is described below (adapted and redrawn with permission from [98], copyright © 2010 IEEE )................................................................................................................................................................. 85
Figure 63: An illustration of two neurons and how an impulse travels from one neuron to the other. (adapted and redrawn with permission from [98], copyright © 2010 IEEE ).............................................................................................................................. 86
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Figure 64: A piece of Slime Mold or Physarum Polycephalum in the nature (reprinted from [152] and is free to share under the terms of the GNU Free Documentation License)........................................................................................................................... 87
Figure 65: The Agar maze used to experiment on the slime mold – with the two exits providing the food. The final stage where the Physarum Polycephalum has found the shortest path is shown (Reprinted by permission from Macmillan Publishers Ltd: Nature [153], copyright 2000)......................................................................................................................................................... 87
Figure 66: Eric Kandel (left), The sea slug Aplysia (center), an illustration of the Aplysia and its gill (right) (adapted from [105], Photo Credit: Eric Kandel )............................................................................................................................................................. 88
Figure 67: material implication using the memristor (adopted with permission from [107])............................................................ 89
Figure 68: The model of a linear resistor sub-circuit (adapted with permission from [146], copyright © 2010 IEEE).................... 92
Figure 69: The model of a nonlinear resistor, memristor sub-circuit, (adapted with permission from [146], copyright © 2010 IEEE) ........................................................................................................................................................................................................ 92
Figure 70: (Left): The current (bottom) of the memristor when applied a sinusoid voltage (top). (Right): The current-voltage characteristic of the modeled memristor (adapted with permission from [146], copyright © 2010 IEEE)....................................... 93
Figure 71: The schematic model of the memristor based on [146]................................................................................................ 94
Figure 72: The voltage (green) and current (red) waveforms of the modeled memristor............................................................... 94
Figure 73: The I-V curve of the modeled memristor according to [146]......................................................................................... 95
Figure 74: The schematic of the SPICE model used to model the memristor (redrawn and adapted with permission from [51]). 96
Figure 75: The designed memristor model based on [51]. First approach..................................................................................... 98
Figure 76: The designed memristor model based on [51]. Second approach................................................................................ 99
Figure 77: The current-voltage characteristic of the designed memristor model based on [51]..................................................... 99
Figure 78: The schematic of the memristor SPICE model by Kavehei (redrawn and adapted with permission from [45]).......... 100
Figure 79: The designed memristor model based on [45]............................................................................................................ 101
Figure 80: The voltage (red) and current (green) curves of the memristor model based on [45]................................................. 102
Figure 81: The current-voltage characteristic of the designed memristor model based on [45]................................................... 102
Figure 82: The applied voltage (left) and the current (right) of the simulated memristor MATLAB model.................................... 103
Figure 83: The current-voltage characteristic (left) and the q-φ curve (right) of the simulated memristor MATLAB model.......... 103
Abbreviation Full name Described in
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Before 1971, all the electronics were based on three basic circuit elements. Until a professor from UC Berkeley reasoned that another basic circuit element exists, which he called memristor; characterized by the relationship between the charge and the flux-linkage. A memristor is essentially a resistor with memory. The resistance of a memristor (memristance) depends on the amount of current that is passing through the device.
In 2008, a research group at HP Labs succeeded to build an actual physical memristor. HP's memristor was a nanometer scale titanium dioxide thin film, composed of two doped and undoped regions, sandwiched between two platinum contacts. After this breakthrough, a huge amount of research started with the aim of better realization of the device and discovering more possible applications of the memristor.
In this report, it is attempted to cover a proper amount of information about the history, introduction, implementation, modeling and applications of the device. But the main focus of this study is on memristor modeling. Four papers on modeling of the memristor were considered, and since there were no cadence models available in the literature at the time, it was decided to develop some cadence models. So, cadence models from the mentioned papers were designed and simulated. From the same modeling papers some veriloga models were written as well. Unfortunately, due to some limitation of the design tool, some of the models failed to provide the expected results, but still the functioning models show satisfactory results that can be used in the circuit simulations of memristors.
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1. INTRODUCTION
The memristor, known as the forth basic element or the missing link, was discovered by Professor Leon Chua, from University of California Berkeley in 1971. Previously, to describe the relationship between the four corner stones, the magnetic flux φ , electric charge q , current i, and voltage v , only the basic circuit elements: the resistor R , the inductor L , and the capacitor C have been used. But then based on the symmetry and the fact that the relations between four factors are described using three elements, he proposed that there exists another basic circuit element and called it “memristor: the missing link”. He even made a prototype of its active realization on a breadboard which was far away from being miniaturized. In 2008, a research group at HP Labs lead by Stanley Williams succeeded to fabricate the device in nanometer scale. Since then, the research being conducted on memristors gained momentum and the number of publications have boosted quite rapidly.
Figure 1 : Accumulated number of reports on memristor since 1971
0
200
400
600
800
1000
1200
1400
1600
Number of publications
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Figure 1, as well as Figure 2 shows the accumulated number of academic reports on memristors since
There has not much time passed since HP Labs found a physical realization of the memristor and presented a model for it. Since then, extensive research is going on to develop accurate and close to the physical behavior models of the memristor. Many models have been introduced so far, and each of them has their own advantages and disadvantages. Based on the need for more accurate models and also in order to gain a better understanding of the function and properties of the memristor, it was decided to perform a rather broad study of the memristor and simulate some models. So far, most of the memristor models are SPICE models. In this thesis work, a couple of memristor models are introduced in schematic circuit models using Cadence and also Veriloga which is a Hardware Description Language (HDL).
Figure 2 : The number of related published papers since 1971 (Google scholar updated in 28/05/2012). Reprinted with permission from [143].
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section, 1.1, a few Cadence models were designed based on the available published papers in the literature. Therefore, to be concise, the objective was to perform a literature study of the memristor device and develop Veriloga and schematic circuit models.
This thesis work just started with an introduction of the topic of this research study, and also the motivation behind the work (chapter 1 ). Chapter 2 gives a brief history of the basic circuit elements, and then discusses where the memristor was originated from. An introduction to how Leon Chua found the missing circuit element and how HP Labs succeeded in building a physical model from that is also given in chapter 2. Chapter 3 is dedicated to the actual memristor device, where a clear definition of the device along with its properties are discussed. Chapter 4 talks about the more popular memristor models that are available in the literature. Different models are listed and a comparison is done among them to identify the most suitable memristor model. Memristor implementation is discussed in chapter 5. We mention the different materials used in memristor fabrication, the manufacturing techniques and several physical structures. In chapter 6 , the main areas that memristors are being used in are introduced; several applications ranging from non-volatile memories to neuromorphic circuits are mentioned. The simulation results and the memristor model created in Cadence are presented in chapter 7. A short conclusion is then given in chapter 8. Some ideas for future work is also mentioned in this chapter. The Veriloga codes can be found in the appendix in chapter 9. And finally the references are listed in 10.
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2. A BRIEF HISTORY OF CIRCUIT
ELEMENTS
Around four decade ago, Leon Chua published his paper about memristor. However, the concept of a resistor with some memory characteristics, was already studied by some other scientists. Chua was the one to establish a more accurate connection on his findings. In this section, a short introduction on memristor history is given, and after that a perspective of the research that has been conducted on memristor research over the past 50 years is discussed more in detail.
Between 1994 and 2008, there were many other researchers achieving similar characteristics like hysteresis feature, but were not able to connect the link. Therefore, they were referred to as anomalous current-voltage behaviors or characteristics. But only researchers at HP Labs successfully and interestingly by chance found a connection between their results and Chua 's memristor.
Finally in 2008, almost four decades after Chua's prediction, a research group consisted of hundreds of scientists lead by Stanley R. Williams actually build the memristor in physical form. The research was conducted in the Information and Quantum Systems (IQS) Laboratory. Then, Dmitri Strukov, Gregory Snider, Duncan Stewart and Stanley Williams published in Nature and described the connection between Chua's memristor and the resistance switching characteristic of the bi-layer titanium oxide structure in nanometer scale. They also proposed a model for the memristor.
A history of the research that has been done based on the time-line is listed in the following [1].
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1993 Katsuhiro Nichogi, Akira Taomoto, Shiro Asakawa & Kunio Yoshida (From the Matsushita Research Institute)
They received U.S. Patent 5,223,750 [9] for describing an artificial neural function circuit that was created using two terminal organic thin film resistance switches. Although nothing was mentioned about the memristor, still there were some similarities in terms of properties.
1994 F. A. Buot & A. K. Rajagopal
They published the article entitled "Binary information storage at zero bias in quantum-well diodes" and described current-voltage characteristics which was similar the memristor I-V curves in AlAs/GaAs/AlAs quantum well diodes. But again no relation to Chua's paper was found. The authors were not aware of Chua's paper at the time. [10]
1998 Michael Kozicki & William West
On June 2nd, they received U.S. Patent 5,761,115 for presenting the Programmable Metallization cell. The device consisted of an ion conductor between two or more electrodes, where the resistance or capacitance of the ion conductor can be programmed via the growth and dissolution of a metal "dendrite". Despite some similarity to the memristor, there is no connection mentioned. [11]
Bhagwat Swaroop, William West, Gregory Martinez, Michael Kozicki & Lex Akers
On June 3rd, they published a paper entitled "Programmable current mode Hebbian learning neural network using programmable metallization cell" [12]. They demonstrated that by using an ionic programmable resistance device, we can minimize the complexity of an artificial synapse.
James Heath, Philip Kuekes, Gregory Snider, & Stan Williams (From HP Labs)
In June 12th, the researchers at HP Labs discussed implementation of a chemically fabricated two terminal configurable bit element in a crossbar configuration, provided for defect tolerant computing, in their paper entitled "A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology" [13]. Still, no connection to memristors is found.
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2000 A. Beck, J. G. Bednorz, Ch. Gerber & C. Rossel, (From IBM Research Lab in Zurich)
In July 3rd, the researchers at IBM Research Lab in Zurich published an article entitled "Reproducible switching effect in thin oxide films for memory applications" in Applied Physics Letters [14]. They reported resistance switching behavior in thin oxide films that was reproducible. The resulting hysteresis characteristic was similar to memristor, without pointing out the relation to memristor.
Philip Kuekes, Stanley Williams & James Heath (From HP Labs)
In October 3rd, researchers at HP Labs received U.S. Patent 6,128, (assigned to HP) [15] and described a two terminal nonlinear resistance switch as a rotaxane molecular structure of a nanoscale crossbar. Once again, no relation to memristor was mentioned.
2001 Shangqing Liu, NaiJuan Wu, Xin Chen & Alex Ignatiev (From University of Houston)
They, in the article "A New Concept for Non-Volatile Memory: The Electric Pulse Induced Resistive Change Effect in Colossal Magneto- resistive Thin Films" [16], showed that oxide bi-layers are very important in achieving high-to-low resistance ratio. Similar characteristics were reported, but still no connection to memristors is provided.
2005 Darrell Rinerson, Christophe Chevallier, Steven Longcor, Wayne Kinney, Edmond Ward & Steve Kuo-Ren Hsia
In March 22th, they received U.S. Patent 6,870,755 (assigned to Unity Semiconductor) [17] for introducing reversible two terminal resistance switching materials based on metal oxides.
Zhida Lan, Colin Bill & Michael Van Buskirk
In November 1st, they received U.S. Patent 6,960,783 (assigned to Advanced Micro Devices) [18] which introduces a resistance switching memory cell that was made from a layer of organic material and a layer of metal oxides or sulfides. It showed similar current-voltage characteristic to the memristor, but nothing mentioned about it.
2006 Stanford Ovshinsky He received U.S. Patent 6,999,953 [19] and described using a neural synaptic system based on phase change material as a two terminal resistance switch. Although Chua's paper is cited as a reference, but no connection to memristor is mentioned.