Introduction to 8086 Microprocessor, Study notes of Electrical Engineering

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FACULTY OF ENGINEERING

Prepared by

Prashant Kumar (Faculty ECE Department, FoE TMU)

POWERPOINT

PRESENTATION

On

8086 microprocessor

CONTENT

• (^) Introduction
• (^) Architecture 0f 8086
• (^) Register Description
• (^) Pin Configuration
• (^) 8086 & 8088 Microprocessor
• (^) Flag register of 8086

**_- 16-bit Arithmetic Logic Unit

• 16-bit data bus (8088 has 8-bit data bus)
• 20-bit address bus - 2_**^20 = 1,048,576 = 1 meg The address refers to a byte in memory. In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15). The 8086 can read a 16-bit word at an even address in one operation and at an odd address in two operations. The 8088 needs two operations in either case. The least significant byte of a word on an 8086 family microprocessor is at the lower address. 8086 FEATURES

_The EU contains the following 16-bit registers: AX - the Accumulator BX - the Base Register CX - the Count Register DX - the Data Register SP - the Stack Pointer _ (^) defaults to stack segment BP - the Base Pointer / SI - the Source Index Register DI - the Destination Register These are referred to as general-purpose registers, although, as seen by their names, they often have a special-purpose use for some instructions. The AX, BX, CX, and DX registers can be considers as two 8-bit registers, a High byte and a Low byte. This allows byte operations and compatibility with the previous generation of 8-bit processors, the 8080 and 8085. 8085 source code could be translated in 8086 code and assembled. The 8-bit registers are: AX --> AH,AL BX --> BH,BL CX --> CH,CL DX --> DH,DL

8086 PROGRAMMER’S MODEL ES CS SS DS IP AH BH CH DH

AL

BL

CL

DL

SP

BP

SI

DI

FLAGS

AX

BX

CX

DX

Extra Segment Code Segment Stack Segment Data Segment Instruction Pointer Accumulator Base Register Count Register Data Register Stack Pointer Base Pointer Source Index Register Destination Index Register BIU registers (20 bit adder) EU registers

8086 MİCROPROCESSOR

Data Registers: AX, BX, CX, DX

• (^) Instructions execute faster if the data is in a register
• (^) AX, BX, CX, DX are the data registers
• (^) Low and High bytes of the data registers can be accessed separately - (^) AH, BH, CH, DH are the high bytes - (^) AL, BL, CL, and DL are the low bytes
• (^) Data Registers are general purpose registers but they also perform special functions
• (^) AX
  • (^) Accumulator Register
  • (^) Preferred register to use in arithmetic, logic and data transfer instructions because it generates the shortest Machine Language Code
  • (^) Must be used in multiplication and division operations
  • (^) Must also be used in I/O operations

• (^) BX
  • (^) Base Register
  • (^) Also serves as an address register
• (^) CX
  • (^) Count register
  • (^) Used as a loop counter
  • (^) Used in shift and rotate operations
• (^) DX
  • (^) Data register
  • (^) Used in multiplication and division
  • (^) Also used in I/O operations

• (^) DI: Destination Index register
  • (^) is also required for some string operations.
  • (^) When string operations are performed, the DI register points to memory locations in the data segment which is addressed by the ES register. Thus, DI is associated with the ES in string operations.
• (^) The SI and the DI registers may also be used to access data stored in arrays

Segment Registers - CS, DS, SS and ES

• (^) Are Address registers
• (^) Store the memory addresses of instructions and data
• (^) Memory Organization
  • (^) Each byte in memory has a 20 bit address starting with 0 to 2^20 -1 or 1 meg of addressable memory
  • (^) Addresses are expressed as 5 hex digits from 00000 - FFFFF
  • (^) Problem: But 20 bit addresses are TOO BIG to fit in 16 bit registers!
  • (^) Solution: Memory Segment
    • (^) Block of 64K (65,536) consecutive memory bytes
    • (^) A segment number is a 16 bit number
    • (^) Segment numbers range from 0000 to FFFF
    • (^) Within a segment, a particular memory location is specified with an offset
    • (^) An offset also ranges from 0000 to FFFF

• (^) CF (carry) Contains carry from leftmost bit following arithmetic, also contains last bit from a shift or rotate operation. FLAG REGİSTER Flag O D I T S Z A P C Bit no. 15 14 13 12 11 1 0 9 8 7 6 5 4 3 2 1 0
• (^) Conditional flags:
• (^) They are set according to some results of arithmetic operation. You do not need to alter the value yourself.
• (^) Control flags:
• (^) Used to control some operations of the MPU. These flags are to be set by you in order to achieve some specific purposes.

FLAG REGİSTER

• (^) OF (overflow) Indicates overflow of the leftmost bit during arithmetic.
• (^) DF (direction) Indicates left or right for moving or comparing string data.
• (^) IF (interrupt) Indicates whether external interrupts are being processed or ignored.
• (^) TF (trap) Permits operation of the processor in single step mode.